通过开停控制降低三系统冰箱能耗分析

分析了三系统的三门冰箱开停机的能耗损失原因和数值。通过开停机判断的优化,使原来各个间室的单独开停机组合在一起,减少了开停次数,也即减少了因为开停机造成的能耗损失,实现了节能。     

基于社会化库存的多回程物流配送问题的拉格朗日松弛算法

社会化库存是同城配送快速发展所呈现出的一种新特征。在社会化库存模式下,顾客可从多个同城商店订购货物,其物流配送服务需要通过配送车辆在商店与顾客间的多次往返而实现,这是一类特殊的多回程混合取送物流配送问题。针对该问题,建立了混合整数规划模型及改进的拉格朗日松弛算法;考虑到传统拉格朗日松弛算法存在无法有效提供上界的缺陷,引入了基于次短路的可行解生成思想,实现了问题上界的有效求解。仿真算例表明,所提算法能够取得优于CPLEX求解器的计算效率。     

半桥电流馈入型LLC变换器的补偿电路设计

由于半桥电流馈入型LLC谐振变换器的工作过程相当复杂,很难建立准确的小信号模型,也无法设计相应的补偿电路。基于Saber仿真软件,利用时域仿真的方法获得电路的波特图,即可进行补偿电路的设计。制作了一款适用于单板光伏电池逆变器用半桥电流馈入型LLC变换器,通过仿真和实验,验证了补偿环节和设计方法的正确性。     

智能变电站过程层设备及二次回路优化研究

本文分析了合并单元智能终端集成装置实现的可行性和方法,研究了智能终端整合状态监测参量的可行性和方案,对智能终端和断路器二次回路进行了优化整合;本文对有载调压二次控制回路进行了整合和智能化方案研究,通过可编程逻辑控制器(Programmable Logic Controller,PLC)和变频控制,对变压器冷却系统实现了智能化。     

2‐matrix‐based finite element linear solver for fast transient thermal analysis of high‐performance ICs

In this article, we propose ²‐based finite element (FE) solver for transient thermal analysis of high‐performance integrated circuits (ICs). ²‐matrix is a special subclass of hierarchical matrix or ‐matrix, which was shown to provide a data‐sparse way to approximate the matrices and their inverses with almost linear space and time complexities. In this work, we show that ²‐based mathematical framework can also be applied to FE‐based transient analysis of thermal parabolic partial differential equations. We show how the thermal matrix can be approximated by ²‐representations with controlled error. Then, we demonstrate that both storage and time complexities of the new solver are bounded by , where N is the matrix size. The method can be applied to any thermal structures for both steady and transient analysis. The numerical results from 3D ICs demonstrate the linear scalability of the proposed method in terms of both memory footprint and CPU time. The comparison with existing product‐quality LU solvers, CSPARSE and UMFPACK, on a number of 3D IC thermal matrices, shows that the new method is much more memory efficient than these methods, which however prevents the demonstration of the potential speedup of the proposed method over those methods. Copyright © 2014 John Wiley & Sons, Ltd.     

A pseudo‐differential current‐reuse structure for opamp‐sharing pipelined analog‐to‐digital converters

In this paper, a power efficient pseudo‐differential (PD) current‐reuse structure is presented to alleviate the memory effects of opamp‐sharing in pipelined analog‐to‐digital converters. To implement the PD current‐reuse structure, a switched‐capacitor circuit is introduced for multiplying digital‐to‐analog converter, which has a slight modification compared with the conventional switching scheme with no power penalty. In the proposed multiplying digital‐to‐analog converter circuit, the common‐mode offset amplification of the PD structures is eliminated. Moreover, a PD current‐reuse amplifier is developed from the telescopic structure with an inverter‐based gain‐boosting circuit. The effectiveness of the proposed structure is evaluated in comparison with existing current‐reuse techniques. Copyright © 2014 John Wiley & Sons, Ltd.     

0.5‐V fractional‐order companding filters

Novel configurations of fractional‐order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh‐domain and log‐domain integrators are presented. Because of the employment of metal–oxide–semiconductor (MOS) transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra‐low‐voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional‐order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company (TSMC) 180‐nm complementary MOS (CMOS) process. Copyright © 2014 John Wiley & Sons, Ltd.     

Gate‐level body biasing for subthreshold logic circuits: analytical modeling and design guidelines

Gate‐level body biasing provides an attractive solution to increase speed and robustness against process and temperature variations while maintaining energy efficiency. In this paper, the behavior of basic logic gates, designed according to the proposed design technique, is analytically examined with the main purpose of furnishing important guidelines to design efficient subthreshold digital circuits. Our modeling has been fully validated by comparing the predicted results with SPICE simulations performed for a commercial 45‐nm complementary metal oxide semiconductor technology. Considering process, temperature and loading capacitance variations, the delay of an inverter is predicted with a maximum error lower than 16.5%. Even better results are obtained when our modeling is applied to more complex logic gates. Under process, loading capacitance and temperature variations, the delay of NAND2 and NOR2 logic gates is always predicted with an error below 10%. Good agreement between the predicted and simulated results makes our modeling a valuable support during the circuit design phase. Copyright © 2014 John Wiley & Sons, Ltd.     

A novel magneto‐impedance sensor model based on the zeros of Bessel functions

Nowadays, the design of magneto‐impedance (MI) sensors requires the development of lumped circuit models that can be simulated through equivalent impedance circuits relied on Bessel functions. A new impedance model based on Senani's equivalent using the zeros of Bessel functions is developed in this paper. The model allows to describe the impedance as a transfer function that can be easily synthesized by means of current conveyor circuits and passive elements. The mathematical representation was verified under simulation of transfer functions involving different number of poles and zeros. Moreover, the model has been verified using SPICE simulations and measurement results from a fabricated prototype demonstrating its scope and validity. Finally, a study of finite tracking errors of CCIIs used in the implementation of magneto‐impedance sensor has been realized. Copyright © 2014 John Wiley & Sons, Ltd.     

某型导弹自驾仪的故障诊断研究

模拟电路的故障诊断存在着信号非线性、样本初期获取困难等问题,支持向量机技术具有小样本、非线性、全局最优和建立的模型能更好泛化等诸多优点,为解决这些问题提供了一条有效途径。以某型导弹自驾仪中电路为典型例子,在C-SVM基础上构建模糊支持向量机,并采用粒子群算法与遗传算法进行向量机的参数优化。首先采用小波包分解提取故障信息的特征向量并归一化,然后将训练集送入改进后的向量机中完成训练,最后将测试集送入训练好的向量机中完成不同故障模式的识别,故障检测率达到93.3333%。结果表明在样本量较少的情况下,改进后的支持向量机可以很好地完成故障诊断任务。